1. Field of the Invention
The invention relates to methods of device fabrication on a silicon substrate, and more particularly to the fabrication of ultra-thin suicides in sub-quarter micron devices through pulsed-laser, self-aligned silicide formation.
2. Description of the Related Art
Current practice uses rapid thermal processing (RTP) for the 2-step anneal in the Ti-Salicide process where "salicide" stands for self-aligned silicide. The term "salicide" is defined by S. Wolf and R. N. Tauber in Silicon Processing for the VLSI Era, Volume 1, by Lattice Press, copyright 1986, page 398 as the technology where " . . . metal is deposited over an MOS structure, and reacted with the exposed Si areas of the source and drain, as well as the exposed poly-Si areas on the gate, to form a silicide." With decreasing thermal budget due to bridging and agglomeration considerations, obtaining the low-resistivity C54-phase becomes extremely difficult. The thinner sputtered titanium (Ti) films further reduce the process window for the C49-to-C54phase transformation. In addition, thickness uniformity is another major issue, especially with wafer sizes set to approach the 300 mm generation within the next decade. New methods, materials and schemes are thus needed to extend the integration of the Ti-Salicide process to future generations of sub-quarter micron devices.
U.S. Pat. No. 5,094,977 (Yu et al.) teaches a method comprising a) chemical vapor depositing (CVD) a metal layer atop a semiconductor substrate, and b) impinging laser energy upon the CVD metal layer at an optical fluence from 50 mJ/cm.sup.2 to 300 mJ/cm.sup.2 for a period of time sufficient to relieve mechanical stress associated with the CVD metal layer, yet insufficient to melt the CVD metal layer. In another aspect, such a treatment method could also be used to form a desired silicide layer in the same step.
U.S. Pat. No. 5,569,624 (Weiner) discloses a doping sequence that forms source/drain regions. The process combines the use of patterned excimer laser annealing, dopant-saturated spin-on glass, silicide contact structures and interference effects created by thin dielectric layers to produce source and drain junctions that are ultra-shallow in depth but exhibit low sheet and contact resistance.
U.S. Pat. No. 4,555,301 (Gibson et al.) shows a method for forming heterostructures comprising multiconstituent epitaxial material, on a substrate comprising formation of a layer of "precursor" material on the substrate, and momentarily melting the precursor material by pulsed irradiation.
U.S. Pat. No. 4,359,486 (Patalong et al.) describes scanning a region of a semiconductor surface intended for a metal contact with a closely packed sequence of intense laser light pulses so as to generate a disturbed surface layer and a metal layer is then applied and alloyed into the semiconductor surface.